How a Small Intel Team Built a Blockchain Chip
It all started with a curious email to Ajat Hukkoo.
“I was trying to build new businesses and my boss’s technical assistant sent me an email saying, ‘Well, there is this thing called bitcoin, how about it? Are you doing anything with it? Are you thinking about it?’
“And to be honest, I was not.”
In June, a couple years and a global pandemic distant from that original email, Intel started shipping the Intel® BlockscaleTM ASIC, a tiny – as in about 10 would fit on a U.S. postage stamp – accelerator for energy-efficient cryptocurrency mining. The milestone marked a celebratory moment for a small Intel team called Accelerated Custom Engineering, led by Hukkoo, a vice president with the Accelerated Computing Systems and Graphics Group (AXG).
(Photo : Intel Corporation)
As he dug into it, Hukkoo discovered there were others at Intel looking into blockchains, some who had even built foundational technology that could apply. What was missing, though, was a product and a route to market. That’s where Hukkoo’s team comes in.
“We build accelerators in an accelerated manner,” he explains.
Blockscale meets the benchmark on both fronts. It’s capable of trillions of data operations every second, and it came to market less than a year after the team finalized its design.
Each Blockscale chip contains hundreds of little math engines, originally developed within Intel Labs, that tackle the cryptographic hash function used in the mining process. A mining rig will then combine a few hundred of these chips in a metal box not much bigger than a typical lunch pail.
Some cryptocurrencies can be minted via computationally demanding math (a process called cryptomining). Blockscale aims to make the cryptomining hardware business – trending toward $11 billion in annual sales by 2025 – more customizable, flexible and efficient.
What’s remarkable about the speed and quality of the Blockscale project is that it’s a completely off-roadmap product for a new-to-Intel market, and also that the team didn’t just build a chip. They also built the boards that marry as many as 100 chips together, a controller that orchestrates them all together and the software that runs it. “It’s a complete solution,” Hukkoo confirms.
“Then we can go to our customers and say, ‘Here’s the chip and the reference board, so you can take our design and improve on it, or you can take the design as is and make your own systems out of it,'” explains Hukkoo.
The Blockscale ASIC is now shipping in high volume, and as Intel CEO Pat Gelsinger explained to investors in July, “We expect to ship millions of units this year, not originally in our forecast.”
If software sells chips, make software first
One key to making this all work quickly – with a global team of a few dozen engineers – is parallel work similar to how a 300-chip mining rig runs. “I always follow what I call a platform-first approach, where we’re not building the chip in a vacuum,” Hukkoo says. “It is always being built with software in mind, because chips don’t sell themselves – it is software on the chips that sell the chips.”
“We have the software architect on the chip from Day One,” he adds, “to make sure that what the hardware team is building is usable.” The chip goes through three different phases of virtual design, each of which the software team uses to build on top of, in parallel, enabling complete end-to-end operation before the chip is sent to manufacturing. That means the actual final chip “is usually the fourth thing the software team has seen.”
On the hardware side, the other priority besides faster math was saving power. “There is no other product at Intel that ships at this ultra-low voltage,” Hukkoo notes, less than half the voltage of a typical Intel chip. To achieve it, the team had to take some risks. They took a leap of faith on a power-saving approach that Hukkoo describes as what an electrical engineering professor “would teach you about and then tell you not to use, because there’s too much risk in it.” But after a bunch of simulations and a successful test chip, “we knew we could build a product out of it.”
As a result, the Blockscale ASIC is both fast and flexible – it can be run at a wide range of frequencies, enabling system designers to balance performance and efficiency.
Back to the start-up
“I like to work on the small projects that have directional impact on the company,” says Hukkoo. “I like to keep my teams small and have people do more than one job.” That keeps people from fighting over territory and opens more opportunities to learn and try new things, he explains.
“I hire for interest and capability and not for what people know, because nobody knows everything. New fields come up all the time and you have to be able to absorb information and grow and make contributions in those areas.”
Next up for Hukkoo and team is fully homomorphic encryption (FHE), an area he confides he also wasn’t aware of before a potential project came his way. “Imagine a world in which hacking is a thing of the past,” he says, “because all your data was stored encrypted and you could operate on encrypted data.” FHE makes computation of encrypted data possible – and if data is never decrypted, it’s always safe.
As announced last year under the DARPA DPRIVE program, Intel plans to design an ASIC accelerator to reduce the performance overhead currently associated with fully homomorphic encryption. Hukkoo’s team is part of a cross-Intel effort to bring it to life.
“I like to work at the inception of new concepts and new ideas and nurture new businesses,” Hukkoo says. “That’s who I am. I’m always grateful to Intel to let me do this because most companies would not.”
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